Etch profile control of via opening

A method comprising:

• forming a source/drain contact over an epitaxy structure;
• depositing in sequence an etch stop layer and an interlayer dielectric (ILD) layer over the source/drain contact;
• performing a first etching process on the ILD layer until the etch stop layer has a recess;
• after performing the first etching process, treating the etch stop layer such that the etch stop layer has a treated region cupping an underside of the recess and an un-treated region below the treated region;
• after treating the etch stop layer, performing a second etching process to break through the etch stop layer, wherein the second etching process etches the treated region of the etch stop layer at a slower etch rate than etching the un-treated region;
• and
• after performing the second etching process, forming a source/drain via extending through the etch stop layer.

A device comprising:

• a source/drain contact over a source/drain region of a transistor;
• an etch stop layer over the source/drain contact;
• an interlayer dielectric (ILD) layer over the etch stop layer;
• and
• a source/drain via extending through the ILD layer and the etch stop layer to the source/drain contact, wherein the etch stop layer has an oxidized region in contact with the source/drain via and an un-oxidized region separating the oxidized region from the source/drain contact.