Dual contact process with stacked metal layers

A complementary metal-oxide-semiconductor (CMOS), comprising:

• a first non-planar transistor of a first conductivity type, wherein the first non-planar transistor comprises:
• a first fin extending up from a substrate;
• a second fin extending up from the substrate;
• a first source region connecting the first fin to the second fin;
• a first drain region connecting the first fin to the second fin;
• a first metal over the first source region and the first drain region;
• and
• first contacts connected to the first metal over the first source region and the first drain region;
• and
• a second non-planar transistor of a second conductivity type that is opposite from the first conductivity type, wherein the second non-planar transistor comprises:
• a third fin extending up from the substrate;
• a fourth fin extending up from the substrate;
• a fifth fin extending up from the substrate;
• a second source region connecting the third fin, the fourth fin, and the fifth fin together;
• a second drain region connecting the third fin, the fourth fin, and the fifth fin together;
• a second metal over the second source region and the second drain region;
• the first metal over the second metal;
• and
• second contacts connected to the first metal over the second source region and the second drain region.

A method of forming a complementary metal-oxide-semiconductor (CMOS) device, comprising:

• providing a first non-planar transistor of a first conductivity type and a second non-planar transistor of a second conductivity type that is opposite from the first conductivity type, wherein the first non-planar transistor comprises a first source region and a first drain region, and wherein the second non-planar transistor comprises a second source region and a second drain region;
• depositing a first metal over the first source region, the first drain region, the second source region, and the second drain region;
• forming a mask over the second source region and the second drain region, wherein the first source region and the first drain region are exposed;
• removing the first metal from over the first source region and the first drain region;
• removing the mask;
• and
• depositing a second metal, wherein the second metal directly contacts the first source region and the first drain region, and wherein the second metal directly contacts the first metal over the second source region and the second drain region.

An electronic device, comprising:

• a board;
• a package substrate attached to the board;
• and
• a die electrically coupled to the package substrate, wherein the die comprises a complimentary metal-oxide-semiconductor (CMOS) device, wherein the CMOS device comprises:
• a first transistor with a first metal between a first source region and a first contact;
• and
• a second transistor with a second metal and the first metal between a second source region and a second contact.