Semiconductor structure and manufacturing method thereof
AssigneeChangxin Memory Technologies, Inc.
InventorsYouquan YU, Gongyi WU, Shiran ZHANG
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AssigneeChangxin Memory Technologies, Inc.
InventorsYouquan YU, Gongyi WU, Shiran ZHANG
Estimating the term…
Embodiments of the present disclosure provide a semiconductor structure and a semiconductor structure manufacturing method. The semiconductor structure includes: a base including an array region and a peripheral region, the peripheral region having a first isolation structure, the array region having a second isolation structure, a top opening area of the first isolation structure being greater than that of the second isolation structure; the first isolation structure having a first groove, and a first insulation structure configured to fill the first groove; and the first insulation structure including at least a top isolation layer, a top surface of the top isolation layer being flush with a top surface of the base, and the top isolation layer being made of at least a low dielectric constant material.
A semiconductor structure, comprising:
A semiconductor structure manufacturing method, comprising:
Dependencies are inferred from the claim text.