US 2022/0102429 A1 · SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

Abstract

A semiconductor device includes a substrate having a memory region and a logic region. A first dielectric layer is disposed on the substrate. A first conductive structure and a second conductive structure are formed in the first dielectric layer and respectively on the memory region and the logic region of the substrate. A memory cell is disposed on the first dielectric layer and directly contacts a top surface of the first conductive structure. A first cap layer is formed on the first dielectric layer and continuously covers a top surface and a sidewall of the memory cell and a top surface of the second conductive structure. A second dielectric layer is formed on the first cap. A third conductive structure is formed in the second dielectric layer and penetrates through the first cap layer to contacts the memory cell.

Claims20

Dependent claims

A semiconductor device, comprising:

a substrate having a memory region and a logic region;
a first dielectric layer on the substrate;
a first conductive structure and a second conductive structure formed in the first dielectric layer and respectively on the memory region and the logic region of the substrate;
a memory cell formed on the first dielectric layer and directly contacting a top surface of the first conductive structure;
a first cap layer continuously covering a top surface and a sidewall of the memory cell and directly contacting a top surface of the second conductive structure;
a second dielectric layer on the first cap layer;
and
a third conductive structure formed in the second dielectric layer and through the first cap layer to contact the memory cell.

5 more elements

A method for forming a semiconductor device, comprising:

providing a substrate having a memory region and a logic region;
forming a first dielectric layer on the substrate;
forming a first conductive structure and a second conductive structure in the first dielectric layer and respectively on the memory region and the logic region of the substrate;
forming a memory cell on first dielectric layer and directly contacting a top surface of the first conductive structure;
forming a first cap layer covering a top surface and a sidewall of the memory cell and directly contacting a top surface of the second conductive structure;
forming a second dielectric layer on the first cap layer;
and
forming a third conductive structure in the second dielectric layer and through the first cap layer to contact the memory cell.

5 more elements

Dependencies are inferred from the claim text.

Semiconductor device and method for forming the same

Life of this patent

Semiconductor device and method for forming the same

Life of this patent

Abstract

Claims20