Back-side deep trench isolation structure for image sensor

A method of forming an image sensor, comprising:

• forming photodiodes for a plurality of pixel regions from a front-side of an image sensing die, a photodiode comprising a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type;
• forming a doped isolation well from the front-side of the image sensing die by implanting dopants into the photodiode doping layer through a plurality of implanting processes;
• forming a gate structure and a metallization stack on the front-side of the image sensing die, wherein the metallization stack comprises a plurality of metal interconnect layers arranged within one or more inter-level dielectric layers.
• bonding the image sensing die to a logic die from the front-side of the image sensing die, wherein the logic die comprises logic devices;
• forming a deep trench between adjacent pixel regions by etching from a back-side of the image sensing;
• forming a doped liner with the second doping type lining a sidewall surface of the deep trench;
• and
• forming a dielectric fill layer filling an inner space of the deep trench to form a back-side deep trench isolation (BDTI) structure.

An integrated circuit, comprising:

• an image sensing die having a plurality of pixel regions respectively comprising a photodiode configured to convert radiation that enters the image sensing die from a back-side into an electrical signal, the photodiode comprising a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type;
• a back-side deep trench isolation (BDTI) structure disposed between adjacent pixel regions and extending from the back-side of the image sensing die to a position within the photodiode doping layer, wherein the BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer, the doped liner lining a sidewall surface of the dielectric fill layer;
• a doped isolation well with the second doping type disposed between the adjacent pixel regions and extending from a front-side of the image sensing die opposite to the back-side to a position within the photodiode doping layer;
• a metallization stack arranged on the front-side and comprising a plurality of metal interconnect layers arranged within an inter-level dielectric layer;
• and
• a logic die bonded to the front-side of the image sensing die, the logic die comprising logic devices.