Single crystal horizontal access device for vertical three-dimensional (3d) memory

A method for forming memory arrays having vertically stacked memory cells and having horizontally oriented access devices with vertically oriented access lines, comprising:

• depositing alternating layers of a first dielectric material, a sacrificial material, and a second dielectric material, in repeating iterations vertically through at least four iterations through a vertical stack to form the vertical stack;
• forming a first vertical opening to expose a semiconductor substrate and vertical sidewalls in the vertical stack using a first etchant process;
• selectively etching the sacrificial material a first horizontal length back from the first vertical opening to form a first horizontal opening having a first height;
• epitaxially growing single crystal silicon to fill the first vertical opening and the first horizontal opening by flowing a disilane (Si2H6) gas into the first vertical opening and the first horizontal opening;
• selectively etching the single crystal silicon to reform the first vertical opening;
• selectively etching the second dielectric material, to form a second horizontal opening having a second height and to recess the second dielectric material a second length from the first vertical opening;
• gas phase doping a dopant in a top surface of the single crystal silicon to form a first source/drain region;
• depositing a conductive material the first source/drain region below the second dielectric material;
• and
• etching the vertical stack to maintain the first vertical opening and to expose sidewalls, the single crystal silicon, and the first dielectric material to form a body contact

A memory device, comprising:

• an array of vertically stacked memory cells, the array of vertically stacked memory cells, comprising:
• horizontally oriented access devices having a first source/drain region and a second source drain region separated by a single crystal epitaxially grown channel region, and gates opposing the single crystal epitaxially grown channel region and separated therefrom by a gate dielectric;
• vertically oriented access lines coupled to the gates and separated from the single crystal epitaxially grown channel region by the gate dielectric;
• horizontally oriented storage nodes electrically coupled to the second source/drain region of the horizontally oriented access devices;
• and
• horizontally oriented digit lines electrically coupled above the first source/drain region of the horizontally oriented access devices;
• and
• a vertical body contact formed in electrical contact with a body region of one or more of the horizontally oriented access devices and separated from the first source/drain region and the horizontally oriented digit lines by a dielectric.