Pixel structure, array substrate and display panel

A pixel structure comprising:

• a first data line extending in a first direction;
• a first gate line and a second gate line both extending in a second direction across the first direction.
• a first pixel unit comprising:
• a first pixel electrode;
• and
• a first thin film transistor comprising:
• a first gate electrode connected to the first gate line;
• a first source electrode connected to the first data line;
• and
• a first drain electrode connected to the first pixel electrode;
• a second pixel unit comprising:
• a second pixel electrode;
• and
• a second thin film transistor comprising:
• a second gate electrode connected to the second gate line;
• a second source electrode connected to the first data line;
• and
• a second drain electrode connected to the second pixel electrode;
• wherein, the first pixel unit and the second pixel unit are aligned in the second direction;
• the first pixel electrode is set closer to the first data line than the second pixel electrode, the first thin film transistor and the second thin film transistor are both set close to the first data line;
• a first connecting trace is set between the first drain electrode and the first pixel electrode, a second connecting trace is set between the second drain electrode and the second pixel electrode to make a capacitance of the first pixel unit matching with a capacitance of the second pixel unit.