Semiconductor device and manufacturing method of the semiconductor device
AssigneeSK hynix Inc.
InventorsYoung Geun JANG, Wan Sup SHIN, Ki Hong LEE, Jae Jung LEE
Life of this patent
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Abstract
A semiconductor device, and method of manufacturing a semiconductor device, includes second conductive patterns separated from each other above a first stack structure which is penetrated by first channel structures and enclosing second channel structures coupled to the first channel structures, respectively. Each of the second conductive patterns includes electrode portions stacked in a first direction and at least one connecting portion extending in the first direction to be coupled to the electrode portions.
Claims17
A method of manufacturing a semiconductor device, the method comprising:
- forming a first stack structure including first interlayer insulating layers and first conductive patterns which are alternately stacked on each other, and penetrated by first channel structures;
- forming a second stack structure including second interlayer insulating layers and sacrificial layers which enclose second channel structures coupled to the first channel structures and which are alternately stacked on each other, on the first stack structure;
- forming at least one first opening and at least one second opening which expose the sacrificial layers by etching the second stack structure;
- replacing each of the sacrificial layers with a conductive material through the first opening and the second opening;
- and
- forming second conductive patterns separated from each other through the first opening by etching the conductive material to expose a bottom surface of the first opening such that the second opening is filled with one second conductive pattern among the second conductive patterns.
A method of manufacturing a semiconductor device, the method comprising:
- forming first stack structures separated from each other by a first slit and including first interlayer insulating layers and first conductive patterns which enclose first channel structures, respectively, and alternately stacked on each other;
- forming a first vertical conductive pattern having a sidewall covered by a first slit insulating layer in the first slit;
- forming a second stack structure including second interlayer insulating layers and sacrificial layers which enclose second channel structures coupled to the first channel structures and which are alternately stacked on each other, and exposing an end portion of each of the first stack structures, on the first stack structures;
- forming a second slit by etching a first region of the second stack structure which overlaps the first slit;
- and
- forming a second vertical conductive pattern having a sidewall covered by a second slit insulating layer and extending to be coupled to the first vertical conductive pattern, in the second slit.
Dependencies are inferred from the claim text.