Memory device and method for forming the same

A memory device, comprising:

• a substrate;
• a first gate structure and a second gate structure over the substrate;
• first, second, third source/drain structures over the substrate, wherein the first and second source/drain structures are on opposite sides of the first gate structure, the second and third source/drain structures are on opposite sides of the second gate structure;
• a first via and a second via over the first gate structure and a second gate structure, respectively, wherein the first via is in contact with the first gate structure, and the second via is separated from the second gate structure;
• a first word line and a second word line over the first and second vias, respectively;
• and
• a bit line electrically coupled to the first source/drain structure.

A method, comprising:

• forming first and second gate structures over a substrate;
• forming an interlayer dielectric (ILD) layer adjacent to the first and second gate structures;
• depositing in sequence a first etch stop layer, a first dielectric layer, a second etch stop layer, and a second dielectric layer over the first and second gate structures and the ILD layer;
• forming a first via extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer, and contacting the first gate structure;
• forming an opening in the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer to expose the second gate structure;
• forming a semiconductor layer to fill a lower portion of the opening;
• and
• forming a second via to fill an upper portion of the opening and over the semiconductor layer, wherein the second via and the semiconductor layer form a Schottky diode.