Method and device for finfet sram

A method for manufacturing a semiconductor device, the method comprising:

• providing a substrate structure including a substrate, forming an interlayer dielectric layer on the substrate, forming a plurality of trenches in the interlayer dielectric layer exposing a surface of the substrate and comprising at least a first trench for forming a gate structure of a first transistor, a second trench for forming a gate structure of a second transistor, and a third trench for forming a gate structure of a third transistor;
• forming an interface layer on the bottom of the plurality of trenches;
• forming a high-k dielectric layer on the interface layer and sidewalls of the plurality of trenches;
• forming a first PMOS work function adjustment layer on the high-k dielectric layer of the third trench;
• forming a second PMOS work function adjustment layer in the plurality of trenches after forming the first PMOS work function adjustment layer;
• forming an NMOS work function layer in the plurality of trenches after forming the second PMOS work function adjustment layer;
• and
• forming a barrier layer in the plurality of trenches after forming the NMOS work function layer, and forming a metal gate layer on the barrier layer.