Memory device and method for forming the same

A memory device, comprising:

• a substrate having a P-well region and an N-well region;
• an isolation structure extending along a border between the P-well region and the N-well region;
• a first gate structure extending from a first side of the isolation structure within the P-well region;
• and
• a second gate structure extending from a second side of the isolation structure within the N-well region, wherein when viewed from above, an interface between the first gate structure and the isolation structure is larger than an interface between the second gate structure and the isolation structure.

A method, comprising:

• forming a first semiconductor fin and a second semiconductor fin over a substrate;
• forming a first dummy gate structure over the first semiconductor fin and a second dummy gate structure over the second semiconductor fin;
• forming first gate spacers on either side of the first dummy gate structure and second gate spacers on either side of the second dummy gate structure;
• etching the first and second dummy gate structures to expose inner sidewalls of the first and second gate spacers;
• after etching the first and second dummy gate structures, forming a patterned mask covering the second gate spacers, while leaving the inner sidewalls of the first gate spacers exposed;
• with the patterned mask in place, performing a first etching process on the exposed inner sidewalls of the first gate spacers to thin the first gate spacers;
• after the first etching process, removing the patterned mask;
• and
• forming a first metal gate structure between the first gate spacers, and a second metal gate structure between the second gate spacers.