Plurality of 3d vertical cmos devices for high performance logic
AssigneeTokyo Electron Limited
InventorsMark I. GARDNER, H. Jim FULFORD
Life of this patent
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Abstract
Techniques herein include methods for fabricating vertical stacks of vertical-channel transistors. Vertical channels can be made from an initial epitaxial structure, and electrically isolated at locations to divide the structure into multiple, independent vertical channels. Techniques enable modulating PMOS and NMOS channel composition and channel geometry to match drive currents thereby providing advanced circuit tuning. Advantageously, one process step can be performed per type of epitaxial material to dope epitaxial materials in respective source/drain regions.
Claims20
A semiconductor device, comprising:
- a first transistor disposed on a substrate and including a first channel, current flow through the first channel being perpendicular to a surface of the substrate;
- and
- a second transistor disposed overtop the first transistor and including a second channel, current flow through the second channel being perpendicular to the surface of the substrate, wherein
- the first transistor and the second transistor form a first stack,
- a length of the first channel of the first transistor is defined by a thickness of a first dielectric layer in the first transistor, and
- a length of the second channel of the second transistor is defined by a thickness of a second dielectric layer in the second transistor.
A method of fabricating a semiconductor device, comprising:
- forming a multilayer stack on a surface of a substrate including a semiconductor material, the multilayer stack including a plurality of dielectric layers, the plurality of dielectric layers having at least three different dielectric materials having different etch selectivities to one another, a first dielectric layer of the plurality of dielectric layers having a first thickness corresponding to a first channel length, and a second dielectric layer of the plurality of dielectric layers having a second thickness corresponding to a second channel length;
- forming at least one opening through the multilayer stack to a first layer of the semiconductor material of the substrate;
- growing, epitaxially in the at least one opening, one or more channel materials to form channels such that current flowing through the channels flows perpendicular to the surface of the substrate;
- and
- removing portions of the plurality of dielectric layers around the one or more channel materials but not immediately proximal to the plurality of dielectric layers in the at least one opening to form sidewall structures surrounding the plurality of dielectric layers.
Dependencies are inferred from the claim text.