Configurable computer memory architecture
AssigneeAlibaba Group Holding Limited
InventorsShuangchen LI, Dimin NIU, Hongzhong ZHENG
Life of this patent
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Abstract
A configurable computer memory architecture includes a memory device that includes arrays of memory cells, word lines, column select lines, and data lines (including local and non-local data lines). One or more of the lines include a first segment and a second segment that are separated by a gap that prevents transmission of an electrical signal from the first segment to the second segment. Signals are either transmitted between the two segments or prevented from being transmitted between the two segments, depending on how the computer memory architecture is configured. In this manner, the memory device can be adapted for different use cases.
Claims24
A computer system memory device, comprising:
- a plurality of arrays of memory cells;
- and
- a plurality of lines coupled to the arrays of memory cells, wherein the plurality of lines comprises a plurality of word lines, a plurality of column select lines, and a plurality of data lines;
- wherein a first line of the plurality of lines comprises a first segment and a second segment that are separated by a first gap that prevents transmission of an electrical signal from the first segment to the second segment.
A configurable computer memory architecture, comprising:
- a first die comprising:
- a plurality of arrays of memory cells;
- a plurality of lines coupled to the arrays of memory cells, wherein the plurality of lines comprises a plurality of word lines, a plurality of column select lines, and a plurality of data lines, wherein a first line of the plurality of lines comprises a first segment and a second segment that are separated by a first gap that prevents transmission of an electrical signal from the first segment to the second segment;
- a first pin connected to the first segment of the first line;
- and
- a second pin connected to the second segment of the first line;
- a second die coupled to the first die;
- and
- a first connector coupled to the first pin.
A method of configuring a computer memory architecture, the computer memory architecture comprising:
- a first die comprising:
- a plurality of arrays of memory cells;
- a plurality of lines coupled to the arrays of memory cells, wherein the plurality of lines comprises a plurality of word lines, a plurality of column select lines, and a plurality of data lines, wherein a first line of the plurality of lines comprises a first segment and a second segment that are separated by a first gap that prevents transmission of an electrical signal from the first segment to the second segment;
- a first pin connected to the first segment of the first line;
- and
- a second pin connected to the second segment of the first line;
- a second die coupled to the first die;
- a first connector coupled to the first pin;
- and
- a second connector coupled to the second pin;
- the method comprising:
- accessing information to select a use case for the computer memory architecture;
- generating a control signal according to the use case;
- and
- controlling a component disposed in the second die to connect the first connector to the second connector based on a value of the control signal.
Dependencies are inferred from the claim text.