Semiconductor Device With Isolation And/Or Protection Structures
AssigneeWolfspeed, Inc.
InventorsLei Zhao, Fabian Radulescu
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Abstract
The present disclosure relates to a semiconductor device with isolation and/or protection structures. A semiconductor device can include a substrate, a first transistor and a second transistor, wherein the first transistor and the second transistor are formed on the substrate, and an isolation structure formed on the substrate. The isolation structure can be formed on the substrate between the first transistor and the second transistor. The isolation structure can be configured to isolate the first transistor and the second transistor.
Claims35
A semiconductor device comprising:
- a substrate;
- a first transistor and a second transistor, wherein the first transistor and the second transistor are formed on the substrate;
- and
- an isolation structure formed on the substrate, wherein:
- the isolation structure is formed on the substrate between the first transistor and the second transistor, and
- the isolation structure is configured to isolate the first transistor and the second transistor.
A semiconductor device, wherein the isolation structure is a recessed isolation structure.
A Group III nitride-based semiconductor device comprising:
- a Group III nitride High Electron Mobility Transistors (“HEMT”) die;
- and
- a protection structure around a perimeter of the Group III nitride die.
The Group III nitride-based semiconductor device, wherein the Group III nitride HEMT die is a monolithic die comprising at least a first and second Group III nitride transistor.
The Group III nitride-based semiconductor device, wherein the protection structure is between the first and second transistors.
Dependencies are inferred from the claim text.