Dielectric capacitance recovery of inter-layer dielectric layers for advanced integrated circuit structure fabrication
AssigneeIntel Corporation
InventorsAtul MADHAVAN, Abhishek JAIN, Jinhong SHIN, Anant H. JAHAGIRDAR
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Abstract
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication. In an example, an integrated circuit structure includes a single dielectric layer above a substrate. A plurality of conductive lines is in an upper portion of the single dielectric layer above a lower portion of the single dielectric layer. A carbon dopant region is in the upper portion of the single dielectric layer, the carbon dopant region between adjacent ones of the plurality of conductive lines.
Claims20
An integrated circuit structure, comprising:
- a single dielectric layer above a substrate;
- a plurality of conductive lines in an upper portion of the single dielectric layer above a lower portion of the single dielectric layer;
- and
- a carbon dopant region in the upper portion of the single dielectric layer, the carbon dopant region between adjacent ones of the plurality of conductive lines.
A method of fabricating an integrated circuit structure, the method comprising:
- forming a first conductive interconnect line and a second conductive interconnect line in an inter-layer dielectric (ILD) layer above a substrate;
- implanting carbon into the ILD layer;
- and
- annealing the ILD layer.
A computing device, comprising:
- a board;
- and
- a component coupled to the board, the component including an integrated circuit structure, comprising:
- a single dielectric layer above a substrate;
- a plurality of conductive lines in an upper portion of the single dielectric layer above a lower portion of the single dielectric layer;
- and
- a carbon dopant region in the upper portion of the single dielectric layer, the carbon dopant region between adjacent ones of the plurality of conductive lines.
Dependencies are inferred from the claim text.