Concealed gate terminal semiconductor packages and related methods

A method of forming a semiconductor package comprising:

• providing a lead frame;
• coupling one or more semiconductor die with the lead frame;
• mechanically coupling an interposer with the lead frame and electrically coupling the interposer with at least one of the one or more semiconductor die;
• at least partially enclosing the lead frame with an encapsulant, the one or more semiconductor die and the interposer within the encapsulant forming an unsingulated array;
• and
• singulating the array to form a semiconductor package;
• wherein the interposer comprises an electrically conductive material on a first side of the interposer and an electrically insulative material on a second side of the interposer;
• and
• wherein the interposer is coupled with the lead frame through the electrically insulative material such that the electrically conductive material is electrically isolated from the lead frame.

A semiconductor package comprising:

• a lead frame;
• at least one transistor coupled with the lead frame;
• at least one driver coupled with the lead frame;
• an electrical interconnect electrically interconnecting the at least one driver with a gate node of the at least one transistor using only an interposer;
• and
• an encapsulant at least partially encapsulating the lead frame, the at least one transistor, the at least one driver, and the electrical interconnect;
• wherein the gate node is fully encapsulated by the encapsulant.