Test method of storage device implemented in multi-chip package (mcp) and method of manufacturing an mcp including the test method

A method of manufacturing a multi-chip package (MCP) implementing a storage device comprising a first type memory device, a second type memory device, and a memory controller configured to control the second type memory device, the method comprising:

• mounting the first type memory device and the memory controller on a substrate;
• mounting the second type memory device on the first type memory device;
• forming a mold layer to cover the first and second type memory devices and the memory controller;
• placing the MCP on test equipment, the test equipment comprising a test host configured to test the MCP;
• performing a first function test on the first type memory device using first channel terminals of the test equipment, and simultaneously performing a low power mode test on the second type memory device using second channel terminals of the test equipment;
• analyzing a current measured in the second channel terminals to determine if a crack defect exists in the second type memory device;
• and
• performing a second function test on the memory controller and the second type memory device using the second channel terminals of the test equipment, and simultaneously performing a leakage current test on the first type memory device using the first channel terminals of the test equipment.

A test board for testing a multi-chip package (MCP) implementing a storage device comprising a first type memory device, a second type memory device, and a memory controller configured to control the second type memory device, the test board comprising:

• a first surface facing the MCP, the first surface comprising upper terminals electrically connected to corresponding package terminals of the MCP, and the upper terminals comprising first upper terminals connected to first package terminals related to the first type memory device and second upper terminals connected to second package terminals related to the memory controller and the second type memory device;
• and
• a second surface facing test equipment configured to test the MCP, the test equipment comprising a test host configured to test the MCP, and the second surface comprising first lower terminals connected to first channel terminals of the test equipment and second lower terminals connected to second channel terminals of the test equipment,
• wherein the test host is configured to perform a first function test on the first type memory device using the first channel terminals of the test equipment, and simultaneously perform a low power mode test on the second type memory device using the second channel terminals of the test equipment to determine a pass or failure of the low power mode test.