Post Gate Dielectric Processing for Semiconductor Device Fabrication

A method of forming a semiconductor device, comprising:

• forming a semiconductor fin over a substrate;
• forming spacers over the semiconductor fin, wherein the spacers forms a trench over the semiconductor fin;
• forming an interfacial layer in the trench;
• depositing a high-K dielectric layer over the interfacial layer;
• performing an annealing process to the high-K dielectric layer;
• forming a capping layer over the high-K dielectric layer in one processing tool;
• performing an annealing process to the capping layer;
• removing the capping layer to expose the high-K dielectric layer;
• and
• forming a metal gate electrode over the high-K dielectric layer.

A method of forming a semiconductor device, comprising:

• forming a semiconductor fin over a substrate;
• forming spacers over the semiconductor fin, wherein the spacers forms a trench over the semiconductor fin;
• depositing a high-K dielectric layer in the trench;
• depositing a high-K capping material over the high-K dielectric layer;
• passing a processing gas over a top surface of the high-K capping material to form a capping layer;
• performing an annealing process to the capping layer;
• removing the capping layer to expose the high-K dielectric layer;
• and
• forming a metal gate electrode over the high-K dielectric layer.