Integrated circuit structure and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTe-Chih HSIUNG, Jyun-De WU, Peng WANG, Huan-Just LIN
Life of this patent
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Abstract
A method includes depositing a dielectric cap over a gate structure. A source/drain contact is formed over a source/drain region after forming the dielectric cap. A top of the dielectric cap is doped to form a doped region in the dielectric cap. After doping the top of the dielectric cap, a etch stop layer and an interlayer dielectric (ILD) layer are deposited over the dielectric cap. A via opening is formed to extend though the ILD layer and the etch stop layer to expose the source/drain contact. A source/drain via is filled in the via opening.
Claims20
A method, comprising:
- depositing a dielectric cap over a gate structure;
- forming a source/drain contact over a source/drain region after forming the dielectric cap;
- doping a top of the dielectric cap to form a doped region in the dielectric cap;
- after doping the top of the dielectric cap, depositing a etch stop layer and an interlayer dielectric (ILD) layer over the dielectric cap;
- forming a via opening extending though the ILD layer and the etch stop layer to expose the source/drain contact;
- and
- filling a source/drain via in the via opening.
A method, comprising:
- forming a source/drain contact over a source/drain region;
- performing an ion implantation process to form a doped region in a top of the source/drain contact;
- after performing the ion implantation process, depositing an interlayer dielectric (ILD) layer covering the doped region of the source/drain contact;
- etching the ILD layer to form a via opening exposing the source/drain contact;
- and
- filling a source/drain via in the via opening.
A device, comprising:
- a gate structure;
- a dielectric cap over the gate structure and comprising a doped region and an un-doped region between the gate structure and the doped region;
- a source/drain contact adjacent to the gate structure and in contact with a sidewall of the doped region of the dielectric cap;
- an interlayer dielectric (ILD) layer over the doped region of the dielectric cap and the source/drain contact;
- and
- a source/drain via in the ILD layer and electrically connected to the source/drain contact.
Dependencies are inferred from the claim text.