Systems and methods for determining measurement location in semiconductor wafer metrology
AssigneeKLA Corporation
InventorAsaf Granot
Life of this patent
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AssigneeKLA Corporation
InventorAsaf Granot
Estimating the term…
A system and method for generating a quality metric relating to a fully or partially fabricated semiconductor device wafer (FPFSDW), the method including providing a spot map correlating a plurality of reference field images (RFIs) to a corresponding plurality of reference spot locations (RSLs) on at least one reference structure formed on a reference semiconductor device wafer, taking a measurement of at least a portion of at least one FPFSDW structure formed on the FPFSDW, thereby generating a measurement field image (MFI) of at least a portion of the at least one FPFSDW structure and a pupil image of the at least a portion of the at least one FPFSDW structure, identifying, for the measurement, a measurement spot location (MSL) on the at least one FPFSDW structure, using the MFI and the spot map, and generating a quality metric of the FPFSDW, using the pupil image and the MSL.
A method for generating a quality metric relating to a fully or partially fabricated semiconductor device wafer (FPFSDW), the method comprising:
A system for use with a metrology tool operative to measure a fully or partially fabricated semiconductor device wafer (FPFSDW), the system comprising:
A system for measuring a fully or partially fabricated semiconductor device wafer (FPFSDW), the system comprising:
Dependencies are inferred from the claim text.