US 2022/0101930 A1 · NONVOLATILE MEMORY DEVICE AND OPERATION METHOD THEREOF

Abstract

A nonvolatile memory device includes a memory cell array having cell strings that each includes memory cells stacked on a substrate in a direction perpendicular to the substrate. A row decoder is connected with the memory cells through word lines. The row decoder applies a setting voltage to at least one word line of the word lines and floats the at least one word line during a floating time. A page buffer circuit is connected with the cell strings through bit lines. The page buffer senses voltage changes of the bit lines after the at least one word line is floated during the floating time and outputs a page buffer signal as a sensing result. A counter counts a number of off-cells in response to the page buffer signal. A detecting circuit outputs a detection signal associated with a defect cell based on the number of off-cells.

Claims25

Dependent claims

A nonvolatile memory device comprising:

a memory cell array including a plurality of cell strings, wherein each of the plurality of cell strings includes memory cells stacked on a substrate in a direction perpendicular to the substrate;
a row decoder connected with the memory cells through a plurality of word lines and configured to apply a setting voltage to at least one word line of the plurality of word lines and to float the at least one word line during a floating time;
a page buffer circuit connected with the plurality of cell strings through a plurality of bit lines and configured to sense voltage changes of the plurality of bit lines after the at least one word line is floated during the floating time and to output a page buffer signal as a sensing result;
a counter configured to count a number of off-cells in response to the page buffer signal;
and
a detecting circuit configured to output a detection signal associated with a defect cell based on the number of off-cells.

3 more elements

A storage device comprising:

a nonvolatile memory device including a plurality of cell strings, wherein each of the plurality of cell strings includes memory cells stacked on a substrate in a direction perpendicular to the substrate;
and
a memory controller configured to transmit a command to the nonvolatile memory device, wherein:
the nonvolatile memory device performs a defect cell detection operation in response to the command, and
the defect cell detection operation includes:
applying a setting voltage to at least one word line of a plurality of word lines connected with the memory cells;
floating the at least one word line during a floating time;
after the at least one word line is floated during the floating time, sensing voltage changes of a plurality of bit lines connected with the plurality of cell strings and outputting a page buffer signal as a sensing result;
counting a number of off-cells in response to the page buffer signal;
and
outputting a detection signal associated with a defect cell based on the number of off-cells.

8 more elements

Dependencies are inferred from the claim text.

Nonvolatile memory device and operation method thereof

Life of this patent

Nonvolatile memory device and operation method thereof

Life of this patent

Abstract

Claims25