Memory system
AssigneeKioxia Corporation
InventorsNaomi TAKEDA, Masanobu SHIRAKAWA
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a shift register memory includes blocks and a control circuit. The blocks each includes data storing shift strings. Each of the data storing shift strings includes layers. The control circuit performs storing and reading data by shifting one layer of the layers, in a direction along each of the data storing shift strings. The reading includes reading data from a first layer of the layers. The storing includes storing data to a second layer of the layers. The control circuit reads first data stored in one or more third layers of the layers, the one or more third layers being successive from the first layer, determines a shift parameter in accordance with the reading of the first data, and performs the reading using the determined shift parameter.
Claims16
A shift register memory comprising:
- a plurality of blocks each including data storing shift strings, each of the data storing shift strings including layers;
- and
- a control circuit configured to:
- control the plurality of blocks;
- and
- perform storing data by shifting one layer of the layers in a first direction along each of the data storing shift strings, and reading data in a second direction opposite to the first direction, the reading including reading data from a first layer of the layers, the storing including storing data to the first layer, wherein
- the control circuit is configured to:
- read first data stored in one or more second layers of the layers, the one or more second layers being successive from the first layer;
- determine a shift parameter in accordance with the reading of the first data;
- and
- perform the reading data using the determined shift parameter after reading the first data.
Dependencies are inferred from the claim text.