Non-volatile memory device, controller and memory system

A method of operating a non-volatile memory device, the method comprising:

• receiving a clock signal from a controller through a clock pin;
• receiving a command and an address from the controller in synchronization with the clock signal through a first input/output pin;
• receiving data from the controller in synchronization with the clock signal through a second input/output pin;
• buffering the command and the address received through the first input/output pin in a command/address buffer;
• and
• controlling operations with respect to a plurality of memory cells based on the command and the address buffered in the command/address buffer, by a control logic,
• wherein a first operating speed of the command/address buffer is different from a second operating speed of the control logic.

A memory system comprising:

• a non-volatile memory device;
• and
• a controller configured to transmit a clock signal, a command, an address and data, to the non-volatile memory device;
• wherein the non-volatile memory device comprises:
• a clock pin, the clock signal being received from the controller through the clock pin;
• a first input/output pin, the command and the address being received from the controller in synchronization with the clock signal through the first input/output pin;
• a second input/output pin, the data being received from the controller in synchronization with the clock signal through the second input/output pin;
• a command/address buffer configured to operate at a first operating speed and buffer the command and the address received through the first input/output pin;
• a memory cell array comprising a plurality of memory cells;
• and
• a control logic configured to operate at a second operating speed that is different from the first operating speed, and control operations with respect to the plurality of memory cells based on the command and the address buffered in the command/address buffer.