Shift register and driving method thereof, gate driving circuit and display apparatus

A shift register, comprising:

• an input circuit at least coupled to a first clock signal terminal, an input terminal and a first node, wherein the input circuit is configured to transmit an input signal received at the input terminal to the first node in response to a first clock signal received at the first clock signal terminal;
• a first control circuit coupled to the first clock signal terminal, a first voltage terminal and a second node, wherein the first control circuit is configured to transmit a first voltage of the first voltage terminal to the second node in response to the first clock signal received at the first clock signal terminal;
• a first output circuit coupled to the first node, a second clock signal terminal and an output terminal, wherein the first output circuit is configured to transmit a second clock signal received at the second clock signal terminal to the output terminal in response to a voltage of the first node;
• and
• a second output circuit coupled to the second node, a second voltage terminal and the output terminal, wherein the second output circuit is configured to transmit a second voltage of the second voltage terminal to the output terminal in response to a voltage of the second node.