Semiconductor die with decoupling capacitor and manufacturing method thereof

A semiconductor die, comprising:

• dielectric layers, stacked on a substrate;
• decoupling capacitors, formed in the dielectric layers;
• first and second bonding pads, disposed on the dielectric layers, wherein the first bonding pads are coupled to a power supply voltage, the second bonding pads are coupled to a reference voltage, a group of the decoupling capacitors are located under one of the first bonding pads, first terminals of the group of the decoupling capacitors are electrically connected to the one of the first bonding pads, second terminals of the group of the decoupling capacitors are routed to one of the second bonding pads;
• and
• bond metals, disposed on the first and second bonding pads, wherein the decoupling capacitors are overlapped with the first and second bonding pads, and laterally surround portions of the dielectric layers overlapped with the bond metals.

A semiconductor die, comprising:

• first and second bonding pads, wherein the first bonding pads are coupled to a power supply voltage, and the second bonding pads are coupled to a reference voltage;
• bond metals, disposed on central portions of the first and second bonding pads, respectively;
• and
• decoupling capacitors, disposed under the first and second bonding pads, and overlapped with peripheral portions of the first and second bonding pads, wherein the decoupling capacitors are in parallel connection with one another, first terminals of the decoupling capacitors are electrically connected to the first bonding pads, and second terminals of the decoupling capacitors are electrically connected to the second bonding pads.