Semiconductor packages
AssigneeSamsung Electronics Co., Ltd.
InventorsJinnam KIM, Seokho KIM, Hoonjoo NA, Kwangjin MOON
Life of this patent
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Abstract
A semiconductor package includes a first structure including a first semiconductor chip, and a second structure on the first structure. The second structure includes a second semiconductor chip, a semiconductor pattern horizontally spaced apart from the second semiconductor chip and on a side surface of the second semiconductor chip, an insulating gap fill pattern between the second semiconductor chip and the semiconductor pattern, and through-electrode structures. At least one of the through-electrode structures penetrates through at least a portion of the second semiconductor chip or penetrates through the semiconductor pattern.
Claims20
A semiconductor package comprising:
- a first structure comprising a first semiconductor chip;
- and
- a second structure on the first structure,
- wherein the second structure comprises a second semiconductor chip, a semiconductor pattern horizontally spaced apart from the second semiconductor chip and on a side surface of the second semiconductor chip, an insulating gap fill pattern between the second semiconductor chip and the semiconductor pattern, and through-electrode structures, and
- wherein at least one of the through-electrode structures penetrates through at least a portion of the second semiconductor chip or penetrates through the semiconductor pattern.
A semiconductor package comprising:
- a first structure comprising a first semiconductor chip;
- and
- a second structure on the first structure,
- wherein the second structure comprises a bonding structure bonded to the first semiconductor chip, a second semiconductor chip on the bonding structure, a semiconductor pattern on the bonding structure and horizontally spaced apart from the second semiconductor chip, and an insulating gap fill pattern between the second semiconductor chip and the semiconductor pattern,
- wherein the first semiconductor chip comprises a first semiconductor substrate and a first circuit area,
- wherein the second semiconductor chip comprises a second semiconductor substrate and a second circuit area, and
- wherein the first circuit area and the second circuit area are between the first semiconductor substrate and the second semiconductor substrate.
A semiconductor package comprising:
- a first semiconductor chip;
- a second semiconductor chip on the first semiconductor chip;
- a semiconductor pattern on the first semiconductor chip and horizontally spaced apart from the second semiconductor chip;
- and
- an insulating gap fill pattern between the second semiconductor chip and the semiconductor pattern,
- wherein a distance between the semiconductor pattern and the second semiconductor chip is about 0.5 μm to about 10 μm,
- wherein a thickness of the second semiconductor chip is about 3 μm to about 10 μm,
- wherein a thickness of the first semiconductor chip is greater than the distance between the semiconductor pattern and the second semiconductor chip,
- wherein the thickness of the first semiconductor chip is greater than a thickness of the semiconductor pattern, and
- wherein the thickness of the first semiconductor chip is greater than the thickness of the second semiconductor chip.
Dependencies are inferred from the claim text.