Semiconductor package

A semiconductor package, comprising:

• a sequential stack of a first semiconductor chip and a second semiconductor chip;
• and
• a first internal connection member that connects the first semiconductor chip to the second semiconductor chip,
• wherein the first semiconductor chip includes
• a first substrate that has a first top surface and a first bottom surface that are opposite to each other, and
• a first conductive pad on the first top surface,
• wherein the second semiconductor chip includes
• a second substrate that has a second top surface and a second bottom surface that are opposite to each other,
• a second conductive pad adjacent to the second bottom surface, and
• a second conductive bump bonded to the second conductive pad,
• wherein the first internal connection member connects the first conductive pad to the second conductive bump,
• wherein the first internal connection member includes:
• a first connection region adjacent to the first conductive pad, and
• a second connection region adjacent to the second conductive bump,
• wherein each of the first and second connection regions includes gold (Au),
• wherein the first connection region has a first average thickness, and
• wherein the second connection region has a second average thickness smaller than the first average thickness.

A semiconductor package, comprising:

• a sequential stack of a plurality of semiconductor chips;
• and
• a mold layer that covers the plurality of semiconductor chips,
• wherein each of the semiconductor chips includes
• a semiconductor substrate that has a top surface and a bottom surface,
• an interlayer dielectric layer that covers the bottom surface,
• a first conductive pad below the interlayer dielectric layer,
• a conductive bump bonded to the first conductive pad,
• a through via that penetrates the semiconductor substrate, and
• a second conductive pad on the top surface and in contact with the through via,
• wherein the second conductive pad has a first width in one direction,
• wherein the conductive bump has a second width in the one direction, and
• wherein the first width is smaller than the second width.