Semiconductor devices with backside power rail and methods of fabrication thereof

A semiconductor device, comprising:

• a first source/drain feature, wherein the first source/drain feature has a first surface, a second surface, and a sidewall connecting the first surface and second surface, and the second surface is a concave surface;
• a second source/drain feature, wherein the second source/drain feature has a first surface, a second surface, and a sidewall connecting the first surface and second surface, the second surface is a convex surface, and the first and second source/drain features comprise a n-type dopant at a first concentration;
• one or more semiconductor channels connecting to the sidewalls of the first and second source/drain features;
• a gate dielectric layer formed around each of the one or more semiconductor channels;
• a gate electrode layer formed over the gate dielectric layer;
• and
• a source/drain contact formed on the second surface of the first source/drain feature.

A method for forming a semiconductor device, comprising:

• forming a semiconductor fin on a first side of a substrate;
• forming a sacrificial gate structure over the semiconductor fin;
• etching the semiconductor fin to form a first source/drain recess and a second source/drain recess, wherein the first and second source/drain recesses are on opposite sides of the sacrificial gate structure;
• further etching the semiconductor fin exposed in the first source/drain recess to form an alignment recess;
• forming a backside contact alignment feature in the alignment recess;
• forming first and second epitaxial features in the first and second source/drain recesses respectively;
• etching the semiconductor fin from a second side of the substrate, wherein the second side is opposite to the first side of the substrate, corner portions of the semiconductor fin remain after etching, and the corner portions of the semiconductor fin is in contact with the first and second epitaxial features;
• and
• depositing a dielectric material over the corner portions of the semiconductor fin.