Semiconductor package and method of manufacture

A semiconductor package comprising:

• a package substrate;
• an interposer disposed on an upper surface of the package substrate;
• a semiconductor chip disposed on an upper surface of the interposer;
• and
• a molding member including an upper surface, an upper portion, a lower portion and a protruding sidewall, wherein the molding member is molded around side surfaces of the semiconductor chip,
• wherein the protruding sidewall includes an upper end vertically offset below the upper surface of the molding member and has a horizontally extending width greater than a horizontally extending width of the upper portion of the molding member.

A method of manufacture for a semiconductor package, the method comprising:

• arranging a first semiconductor chip, a first stacked plurality of second semiconductor chips and a second stacked plurality of second semiconductor chips on an upper surface of an interposer;
• forming a molding member on side surfaces of the first semiconductor chip, the first stacked plurality of second semiconductor chips and the second stacked plurality of second semiconductor chips;
• using an adhesive to attach a carrier substrate to an upper surface of the molding member, an upper surface of the first semiconductor chip, an upper surface of the first stacked plurality of second semiconductor chips and an upper surface of the second stacked plurality of second semiconductor chips;
• using a first blade having a first blade-width to cut away selected portions of the carrier substrate and cut away portions of the adhesive underlying the selected portions of the carrier substrate, and using the first blade to partially cut into an upper surface of the molding member to form a first cutting groove, wherein the selected portions of the carrier substrate are dispose above portions of the molding member between the first stacked plurality of second semiconductor chips and the second stacked plurality of second semiconductor chips;
• using a second blade having a second blade-width narrower than the first blade-width to cut through the interposer and at least partially into a lower surface of the molding member to form a second cutting groove, wherein a combination of the first cutting groove and the second cutting groove separate a package structure including a cut portion of the interposer, the first semiconductor chip and the first stacked plurality of second semiconductor chips, collectively supported by a cut portion of the carrier substrate;
• and
• bonding the package structure to an upper surface of a package substrate.

A method of manufacture for a semiconductor package, the method comprising:

• forming a molding member on side surfaces of semiconductor chips;
• using an adhesive to attach a carrier substrate to an upper surface of the molding member and an upper surface of the semiconductor chips;
• using a first blade having a first blade-width to cut away selected portions of the carrier substrate and portions of the adhesive underlying the selected portions of the carrier substrate, and to partially cut into an upper surface of the molding member to form a first cutting groove, wherein the selected portions of the carrier substrate are dispose above portions of the molding member between adjacent ones of the semiconductor chips;
• using a second blade having a second blade-width narrower than the first blade-width to cut through a lower surface of the molding member to form a second cutting groove, wherein a combination of the first cutting groove and the second cutting groove separate a package structure including a semiconductor chip supported by a cut portion of the carrier substrate;
• and
• bonding the package structure to an upper surface of a package substrate.