Nonvolatile memory device and storage device including nonvolatile memory device

A storage device comprising:

• a nonvolatile memory device including cell strings, wherein each of the cell strings includes a ground selection transistor, memory cells, and a string selection transistor stacked on a substrate in a direction perpendicular to the substrate;
• and
• a controller configured to transfer a command to the nonvolatile memory device, wherein the nonvolatile memory device performs a check operation in response to the command,
• wherein the check operation includes:
• a first period of applying a bias voltage to bit lines connected with the cell strings, applying a turn-off voltage to a ground selection line connected with the ground selection transistor of each of the cell strings, applying a turn-on voltage to a string selection line connected with the string selection transistor of each of the cell strings, and applying a check voltage to word lines connected with the memory cells of each of the cell strings;
• and
• a second period of sensing changes of voltages of the bit lines.

A nonvolatile memory device comprising:

• a peripheral region;
• and
• a memory cell region,
• wherein the memory cell region includes:
• first metal pads;
• and
• a memory cell array including cell strings, wherein each of the cell strings includes a ground selection transistor, memory cells, and a string selection transistor stacked on a substrate in a direction perpendicular to the substrate,
• wherein the peripheral region includes:
• second metal pads;
• a row decoder connected with the ground selection transistor of each of the cell strings through a ground selection line, connected with the memory cells of each of the cell strings through word lines, and connected with the string selection transistor of each of the cell strings through a string selection line;
• and
• a page buffer connected with the cell strings through bit lines,
• wherein the peripheral region is vertically connected by the first metal pads and the second metal pads,
• wherein, in a first period of a check operation, the page buffer is configured to apply a bias voltage to the bit lines,
• wherein, in the first period of the check operation, the row decoder is configured to apply a turn-off voltage to the ground selection line, to apply a turn-on voltage to the string selection line, and to apply a check voltage to the word lines,
• wherein, in a second period of the check operation, the page buffer is configured to sense changes of voltages of the bit lines, and
• wherein, in the second period of the check operation, a status fail signal is output in response to that the changes of the voltages of the bit lines are sensed.