Semiconductor memory device

A semiconductor memory device comprising:

• a stacked layer body including a structure in which a plurality of conductive layers and a plurality of insulating layers are alternately stacked in a first direction;
• a plurality of pillar structures each including a semiconductor layer extending in the first direction through the stacked layer body;
• and
• a plurality of partition structures each extending in the first direction and a second direction intersecting the first direction in the stacked layer body, and partitioning the plurality of pillar structures into a plurality of groups in a third direction intersecting the first and second directions,
• wherein
• the partition structures include a first partition structure including at least two first portions and at least one second portion arranged in the second direction, the second portion being located between the first portions adjacent to each other in the second direction,
• each of the first portions includes a first conductive portion extending in the first direction from an upper end to a lower end of the stacked layer body,
• the second portion extends in the first direction from the upper end of the stacked layer body and terminates at a position between the upper end and the lower end of the stacked layer body, and
• a total length of the at least two first portions in the second direction is longer than a total length of the at least one second portion in the second direction.

A semiconductor memory device comprising:

• a stacked layer body including a structure in which a plurality of conductive layers and a plurality of insulating layers are alternately stacked in a first direction;
• a plurality of pillar structures each including a semiconductor layer extending in the first direction through the stacked layer body;
• and
• a plurality of partition structures each extending in the first direction and a second direction intersecting the first direction in the stacked layer body, and partitioning the plurality of pillar structures into a plurality of groups in a third direction intersecting the first and second directions,
• wherein
• the partition structures include a first partition structure including at least two first portions and at least one second portion arranged in the second direction, the second portion being located between the first portions adjacent to each other in the second direction,
• each of the first portions includes a first conductive portion extending in the first direction from an upper end to a lower end of the stacked layer body,
• the second portion extends in the first direction from the upper end of the stacked layer body and terminates at a position between the upper end and the lower end of the stacked layer body, and
• the device further comprises a wiring provided above the first partition structure, the wiring electrically connecting the first portions adjacent to each other in the second direction with each other.