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US 2022/0093157 A1Published application
Electronic device including memory device and training method
AssigneeSamsung Electronics Co., Ltd.
InventorKYUMIN PARK
Life of this patent
Estimating the term…
Abstract
An electronic device includes a memory device receiving a power supply voltage, a data strobe signal, and a data signal, and a system-on-chip that exchanges data with the memory device using the data strobe signal and the data signal. The system-on-chip performs write training that measures a magnitude of a delay of the data strobe signal due to variation in the level of the power supply voltage and adjusts a delay of the data signal using a result of the write training.
Claims20
A memory device communicating with a system-on-chip (SoC), the memory device comprising:
- a memory cell array;
- a clock path that generates a clock signal by delaying a data strobe signal based on a variation in a level of a power supply voltage;
- a data latch that latches a data signal based on the clock signal and writes the latched data signal to the memory cell array;
- and
- a sense amplifier that provides a magnitude of a delay of the written latched data to the memory cell array to the SoC for a write training.
2 more elements
An electronic device comprising:
- a memory device that communicates with a system-on-chip (SoC);
- the SoC that generates a data strobe signal and a data signal;
- and
- a power management integrated circuit (PMIC) that provides a first power supply voltage and a second power supply voltage to the memory device under control of the SoC,
- wherein the memory device that comprises:
- a memory cell array;
- a clock path that generates a clock signal by delaying the data strobe signal based on a variation in a level of the second power supply voltage;
- a data latch that latches the data signal based on the clock signal and writes the latched data signal to the memory cell array;
- and
- a sense amplifier that provides a magnitude of a delay of the written latched data to the memory cell array to the SoC for a write training.
7 more elements
An electronic device comprising:
- a memory module that communicates with a host and includes a plurality of memory devices;
- and
- the host provides a data strobe signal, a data signal, and a power supply voltage,
- wherein a first memory device of the plurality of memory devices comprises:
- a memory cell array;
- a clock path that generates a clock signal by delaying the data strobe signal based on a variation in a level of the power supply voltage;
- a data latch that latches the data signal based on the clock signal and writes the latched data signal to the memory cell array;
- and
- a sense amplifier that provides a magnitude of a delay of the written latched data to the memory cell array to the host for a write training.
6 more elements
Dependencies are inferred from the claim text.