Semiconductor storage device and controlling method thereof

A control method of a semiconductor device comprising a plurality of memory cells, a differential circuit configured to output a voltage difference between a first node and a second node as an output signal, a first register configured to latch the output signal and output the signal as a hold signal, a first offset part configured to pass a first offset current to a first current path of the differential circuit, and a second offset part configured to pass a second offset current to a second current path of the differential circuit, the method comprising:

• holding first data read from a first memory among the memory cells in the first node;
• outputting the hold signal based on the first data from the first register;
• holding second data read from a second memory cell near the first memory cell among the memory cells in the second node;
• passing the first offset current to the first current path when the hold signal has a first logic level, and passing the second offset current to the second current path when the hold signal has a second logic level that is opposite to the first logic level;
• and
• outputting a voltage difference between the first node and the second node as the output signal.