Dual reference voltage generator, equalizer circuit, and memory

An equalizer circuit, comprising:

• a dual reference voltage generator, a first input buffer circuit, a second input buffer circuit and a selecting and sampling circuit,
• wherein the dual reference voltage generator is configured to receive an original code, a first code and a second code, generates a first reference voltage according to received original code and first code, and generate a second reference voltage according to received original code and second code, the first reference voltage being different from the second reference voltage, and the first reference voltage and the second reference voltage output by the dual reference voltage generator serve as input reference voltages of the first input buffer circuit and the second input buffer circuit, respectively;
• the first input buffer circuit and the second input buffer circuit are respectively connected to the selecting and sampling circuit;
• and
• the selecting and sampling circuit is configured to select, according to data previously output by the equalizer circuit, whether to perform data sampling on a data signal output by the first input buffer circuit or a data signal output by the second input buffer circuit, and take sampled data as data currently output by the equalizer circuit.

A memory, comprising an equalizer circuit, wherein the equalizer circuit comprises:

• a dual reference voltage generator, a first input buffer circuit, a second input buffer circuit and a selecting and sampling circuit,
• wherein the dual reference voltage generator is configured to receive an original code, a first code and a second code, generates a first reference voltage according to received original code and first code, and generate a second reference voltage according to received original code and second code, the first reference voltage being different from the second reference voltage, and the first reference voltage and the second reference voltage output by the dual reference voltage generator serve as input reference voltages of the first input buffer circuit and the second input buffer circuit, respectively;
• the first input buffer circuit and the second input buffer circuit are respectively connected to the selecting and sampling circuit;
• and
• the selecting and sampling circuit is configured to select, according to data previously output by the equalizer circuit, whether to perform data sampling on a data signal output by the first input buffer circuit or a data signal output by the second input buffer circuit, and take sampled data as data currently output by the equalizer circuit.