Performance monitoring unit of a processor deterring tampering of counter configuration and enabling verifiable data sampling
AssigneeIntel Corporation
InventorsRahuldeva Ghosh, Zheng Zhang
Life of this patent
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AssigneeIntel Corporation
InventorsRahuldeva Ghosh, Zheng Zhang
Estimating the term…
A secure performance monitoring unit of a processor includes one or more performance monitoring counters and a secure group manager. The secure group manager is configured to receive a request to create a secure counter group from a software (SW) process being executed by a processor, the request including identification of the one or more counters; determine availability of the one or more counters, creating the secure counter group, assign the one or more counters to the secure counter group, and save a public key of the SW process, when the one or more counters are available; receive and save a private key for the secure counter group; receive a request to configure the secure counter group from the SW process; verify the configuration using the public key of the SW process; and begin sampling of the one or more counters when the configuration is verified.
An apparatus comprising:
A method comprising:
At least one non-transitory machine-readable storage medium comprising instructions that, when executed, cause at least one processing device to at least:
A method comprising:
Dependencies are inferred from the claim text.