Semiconductor device with modified command and associated methods and systems

A method comprising:

• receiving, from a host device, a command at a memory device that includes a memory array corresponding to a plurality of memory addresses each corresponding to a first portion of the memory array configured to store user data and to a second portion of the memory array configured to store error-correcting code (ECC) data associated with the user data of the first portion when an ECC function of the memory device is enabled;
• accessing the second portion of the memory array in response to the command received from the host device and based at least in part on a status of one or more pins of the memory device that indicate a type of access directed by the command;
• and
• communicating with the host device data to or from the second portion of the memory array in response to the command.

A memory system comprising:

• a host device;
• and
• a memory device including:
• a memory array corresponding to a plurality of memory addresses each corresponding to a first portion of the memory array configured to store user data and to a second portion of the memory array configured to store error-correcting code (ECC) data associated with the user data of the first portion when an ECC function of the memory device is enabled, and to store second user data or metadata associated with the memory device, or both, when the ECC function of the memory device is disabled;
• wherein the host device is configured to set a status of one or more pins of the memory device that indicate a type of access of a command addressed to the memory address of the plurality of memory addresses, and
• wherein the memory device is configured to:
• receive, from the host device, the command addressed to the memory address;
• access the second portion of the memory array in response to the command received from the host device and based at least in part on the status of the one or more pins;
• and
• communicate with the host device data to or from the second portion of the memory array in response to the command.