Memory devices and methods for operating the same

A memory device comprising:

• a plurality of memory cells;
• a plurality of evaluation elements, wherein each evaluation element of the plurality of evaluation elements is connectable with a memory cell of the memory device;
• an interconnection unit configured for:
• connecting the plurality of memory cells to a first assignment of evaluation elements in a first state;
• and
• connecting the plurality of memory cells to a second assignment of the evaluation elements in a second state, wherein in the second state, at least one memory cell of the plurality of memory cells is connected to a different evaluation element to which the at least one memory cell is not connected in the first state;
• an evaluation unit configured for controlling the interconnection unit to transition from the first state to the second state;
• and
• a memory having stored thereon error information indicating that a reading operation using a pair of a memory cell of the plurality of memory cells and an evaluation element in the first state is error-prone, wherein the evaluation unit is configured for:
• reading the error information from the memory;
• and
• obtaining an evaluation result of the plurality of memory cells based on a reading operation performed using the second state based on the error information.

A memory device comprising:

• a memory cell;
• a plurality of evaluation elements, wherein each evaluation element of the plurality of evaluation elements is connectable with the memory cell of the memory device;
• an interconnection unit configured for:
• connecting the memory cell to a first evaluation element in a first state;
• and
• connecting the memory cell to a second evaluation element in a second state;
• an evaluation unit configured for:
• obtaining a first evaluation result of the memory cell in the first state;
• obtaining a second evaluation result of the memory cell in the second state;
• determining a deviation between the first evaluation result and the second evaluation result;
• and
• storing a deviation information, that is based on the deviation, in a memory of the memory device.

A method for operating a memory device comprising a plurality of memory cells and a plurality of evaluation elements, wherein each evaluation element of the plurality of evaluation elements is connectable with a memory cell of the memory device, the method comprising:

• connecting the plurality of memory cells to a first assignment of evaluation elements in a first state;
• connecting the plurality of memory cells to a second assignment of the evaluation elements in a second state, wherein, in the second state, at least one memory cell of the plurality of memory cells is connected to a different evaluation element to which the at least one memory cell is not connected in the first state;
• evaluating the plurality of memory cells in the first state to obtain a first evaluation result;
• and
• evaluating the plurality of memory cells in the second state to obtain a second evaluation result.

A method for operating a memory device comprising a memory cell and a plurality of evaluation elements, wherein each evaluation element of the plurality of evaluation elements is connectable with the memory cell of the memory device, the method comprising:

• connecting the memory cell to a first evaluation element in a first state;
• obtaining a first evaluation result, of the memory cell, using the first evaluation element;
• connecting the memory cell to a second evaluation element in a second state;
• obtaining a second evaluation result, of the memory cell, using the second evaluation element;
• determining a deviation between the first evaluation result and the second evaluation result to obtain a deviation information;
• and
• storing the deviation information in a memory.