US 2022/0091776 A1 · PATTERN GENERATION FOR MULTI-CHANNEL MEMORY ARRAY

Abstract

Methods, systems, and devices for pattern generation for multi-channel memory array are described. A device may include a memory array and a circuit for testing the memory array. The memory array may include a first set of memory cells and a second set of memory cells, the first set of memory cells coupled with a first channel and the second set of memory cells coupled with a second channel. The circuit may be coupled with the memory array and may include a pattern generator and an output response analyzer. The pattern generator may be configured to selectively output a single pattern when operating in a single-pattern mode or a plurality of patterns when operating in a multi-pattern mode. The output response analyzer configured to determine whether the memory array includes one or more errors based at least in part on a pattern output by the pattern generator.

Claims20

Dependent claims

An apparatus, comprising:

a memory array comprising a first set of memory cells and a second set of memory cells, the first set of memory cells coupled with a first channel and the second set of memory cells coupled with a second channel;
a circuit coupled with the memory array and comprising:
a pattern generator configured to selectively output a single pattern when operating in a single-pattern mode or a plurality of patterns when operating in a multi-pattern mode;
and
an output response analyzer configured to determine whether the memory array includes one or more errors based at least in part on a pattern output by the pattern generator.

2 more elements

Dependencies are inferred from the claim text.

Pattern generation for multi-channel memory array

Life of this patent

Pattern generation for multi-channel memory array

Life of this patent

Abstract

Claims20