Unified retention and wake-up clamp apparatus and method
AssigneeIntel Corporation
InventorsCharles Augustine, Pascal Meinerzhagen, Suyoung Bang, Abdullah Afzal, Karthik Subramanian, Muhammad Khellah, Arvind Raman
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Abstract
Described is a controller that provides in-situ state retention using a closed loop global retention clamp. The controller addresses di/dt and reliability constraints using an adaptive scheme where steps with smaller current are quickly changed whereas steps with larger current are changed slowly. The loop controller of a voltage regulator is modified for controlling not only retention Vmin during a low power state (e.g., C1LP), but also to control fast wake up the low power state (e.g., from C1LP and from C6).
Claims22
An apparatus comprising:
- a plurality of power gates coupled to an input power supply rail and an output power supply rail;
- a shifter to generate a control word to control the plurality of power gates;
- and
- a controller to instruct the shifter when to shift up a value of the control word, shift down the value of the control word, or maintain the value of the control word, wherein the controller is to shift up or shift in non-monotonic manner to reduce error between a reference beat frequency and a beat frequency of a free-running oscillator.
An apparatus comprising:
- a plurality of power gates coupled to an input power supply rail and an output power supply rail;
- a shifter to generate a control word to control the plurality of power gates;
- and
- a controller to instruct the shifter when to shift up a value of the control word, shift down the value of the control word, or maintain the value of the control word, wherein the controller is to shift the value of the control word such that the control word with small change in the value is modified faster than the control word with larger change in the value.
A system comprising:
- a memory;
- a processor coupled to the memory;
- and
- a wireless interface communicatively coupled to the processor, wherein the processor includes a low dropout regulator comprising:
- a plurality of power gates coupled to an input power supply rail and an output power supply rail;
- a shifter to generate a control word to control the plurality of power gates;
- and
- a controller to instruct the shifter when to shift up a value of the control word, shift down the value of the control word, or maintain the value of the control word, wherein the controller is to shift up or shift in non-monotonic manner to reduce error between a reference beat frequency and a beat frequency of a free-running oscillator.
Dependencies are inferred from the claim text.