Arc fault circuit interrupt tester and method

A circuit assembly for testing an arc fault circuit interrupt (AFCI) device, the circuit assembly comprising:

• a first load switching circuit for creating a pulse pattern having a plurality of pulses;
• a second load switching circuit for creating an overlay signal superimposed upon at least one pulse of the plurality of pulses;
• and
• logic circuitry coupled to the first and second load switching circuits, wherein the logic circuitry is configured to:
• transmit a first control signal to the first load switching circuit to facilitate creating the pulse pattern;
• and
• transmit a second control signal to the second load switching circuit to facilitate creating the overlay signal.

A method for testing an arc fault circuit interrupt (AFCI) device, the method comprising:

• creating, by a first load switching circuit, a pulse pattern having a plurality of pulses;
• creating, by a second load switching circuit, an overlay signal superimposed upon at least one pulse of the plurality of pulses;
• and
• transmitting the pulse pattern and the overlay signal to an AFCI device under test.