US 2022/0091186 A1 · AUTOMATIC FAULT INJECTION IN A CLOCK MONITOR UNIT

Abstract

A self-test mechanism within an integrated circuit to automatically interleave evaluation of a clock signal by a clock monitor unit with periodic testing for faulty operation of a clock monitor unit implemented within the integrated circuit for monitoring a clock signal. The mechanism injects faults into the clock monitor unit to evaluate if the clock monitor unit is operating in accordance with its specified operating parameters. The injected faults are intended to cause the clock monitor unit to determine that the clock signal is operating outside of a specified frequency range. If the injected faults do not cause the clock monitor unit to determine that the clock signal is operating both above and below the specified frequency range, then the clock monitor unit is not functioning according to specified operating parameters.

Claims20

Dependent claims

A method for operating a clock monitor unit configured to monitor a clock signal, the method comprising:

performing an evaluation whether the clock signal has an operating frequency within a specified frequency range during a first measurement window;
and
determining whether the clock monitor unit is accurately performing an evaluation whether the clock signal has an operating frequency within the specified frequency range during a second measurement window by (1) determining whether the operating frequency of the clock signal is higher than a first frequency value predetermined to be lower than the operating frequency of the clock signal during the second measurement window and (2) determining whether the operating frequency of the clock signal is lower than a second frequency value predetermined to be higher than the operating frequency of the clock signal during the second measurement window.

An integrated circuit comprising:

logic circuitry suitable for performing a function within the integrated circuit;
a clock source suitable for providing a clock signal to the logic circuitry, wherein the clock signal is specified to operate at an operating frequency;
and
a clock monitor unit suitable for monitoring the clock signal, wherein the clock monitor unit is configured to:
perform a first comparison of an operating frequency of the clock signal to a first frequency value predetermined to be less than the operating frequency;
perform a second comparison of the operating frequency of the clock signal to a second frequency value predetermined to be greater than the operating frequency;
repeat the first and second comparisons when (1) the first comparison determines that the operating frequency is greater than or equal to the first frequency value and (2) the second comparison determines that the operating frequency is less than or equal to the second frequency value;
and
repeat the first and second comparisons when (1) the first comparison determines that the operating frequency is less than the first frequency value and (2) the second comparison determines that the operating frequency is greater than the second frequency value.

6 more elements

A clock monitor unit configured to evaluate whether a frequency of a monitored clock is operating within a specified frequency range by determining whether counted pulses of the monitored clock are less than or equal to a first pulse count value and greater than or equal to a second pulse count value, the clock monitor unit comprising:

logic circuitry configured to perform a first evaluation of the monitored clock utilizing a high frequency threshold count for the first pulse count value and a low frequency threshold count for the second pulse count value, wherein the high frequency threshold count represents a highest acceptable frequency of the specified frequency range, and wherein the low frequency threshold count represents a lowest acceptable frequency of the specified frequency range;
and
logic circuitry configured to perform a second evaluation of the monitored clock utilizing the high frequency threshold count for the second pulse count value and the low frequency threshold count for the first pulse count value.

Dependencies are inferred from the claim text.

Automatic fault injection in a clock monitor unit

Life of this patent

Automatic fault injection in a clock monitor unit

Life of this patent

Abstract

Claims20