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US 2022/0070033 A1Published application
Pam4 receiver including adaptive continuous-time linear equalizer and method of adaptively training the same using training data patterns
AssigneeUniversity of Seoul Industry Cooperation Foundation
InventorsYoung-Gil GO, Hye-Seong SHIN, Jae-Geol LEE, Hyeon-Woo AHN, Yo-Han KIM, Yongsam MOON
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Abstract
A PAM4 receiver including an adaptive continuous-time linear equalizer and a method for training the same are disclosed. The PAM4 receiver and the method for training the same of the present invention employs a training pattern including a first training data pattern and second training data pattern to adaptively tune the PAM4 receiver to achieve accurate data reception and long-distance, high-speed communication.
Claims18
A PAM4 (pulse amplitude modulation 4) receiver comprising:
- a CTLE (continuous-time linear equalizer) receiving a signal containing:
- (i) a first training data pattern containing data “00” and consecutively arranged first data “11” through mth data “11”;
- and (ii) a second training data pattern including one of data “01”, data “10” and combinations thereof, and equalizing the signal according to an equalization parameter of the CTLE including a high frequency amplification gain and a low frequency amplification gain, and outputting a signal CTLE_out containing equalized first training data pattern and equalized second training data pattern;
- a sampler sampling:
- (i) a difference dlev3HD;
- (ii) a difference dlev3LD;
- and (iii) a difference dlev1D or dlev2D, and outputting sampled differences as a signal SAMPLE_out, wherein the difference dlev3HD is a difference between:
- a first voltage level of the signal CTLE_out corresponding to the first data “11” of the equalized first training data pattern when a transition from the data “00” to the first data “11” occurs;
- and an upper limit dlev3H, the difference dlev3LD is a difference between:
- a second voltage level of the signal CTLE_out corresponding to one of second data “11” through the mth data “11” of the equalized first training data pattern;
- and a lower limit dlev3L, the difference dlev1D is a difference between:
- a third voltage level of the signal CTLE_out corresponding to the data “01” of the equalized second training data pattern;
- and the data level dlev1 corresponding to the data “01”, and the difference dlev2D is a difference between:
- a fourth voltage level of the signal CTLE_out corresponding to the data “10” of the equalized second training data pattern;
- and the data level dlev2 corresponding to data “10”;
- a DEMUX (demultiplexer) parallelizing the signal SAMPLE_out, and outputting parallelized signal SAMPLE_out as a signal DATA_out;
- a CDR (clock-and-data recovery) providing a clock signal for sampling to the sampler and the DEMUX;
- and
- a controller:
- (i) adaptively adjusting a high frequency amplification gain and a low frequency amplification gain of the CTLE by generating and providing a signal EQ_AC[NAC-1:0] and a signal EQ_DC[NDC-1:0] for adjusting the high frequency amplification gain and low frequency amplification gain based on the difference dlev3HD and the difference dlev3LD in the signal DATA_out, respectively;
- and (ii) providing the sampler with threshold voltages VTH01, VTH12 and VTH23, the data level dlev1 or dlev2, and the upper limit dlev3H and the lower limit dlev3L, wherein the threshold voltages VTH01, VTH12 and VTH23 are calculated from:
- a data level dlev0 corresponding to the data “00”;
- the data level dlev1 or dlev2;
- and a data level dlev3 corresponding to the data “11”, the data levels dlev1 and dlev2 are determined from the differences dlev1D and dlev2D, respectively;
- and the data level dlev3 is determined from the upper limit dlev3H and the lower limit dlev3L (where m is a natural number equal to or greater than 2, and NAC and NDC are natural numbers, respectively).
22 more elements
A PAM4 receiver comprising:
- a CTLE (continuous-time linear equalizer) receiving a signal containing:
- (i) a first training data pattern containing data “11” and consecutively arranged first data “00” through mth data “00”;
- and (ii) a second training data pattern including one of data “01”, data “10” and combinations thereof, and equalizing the signal according to an equalization parameter of the CTLE including a high frequency amplification gain and a low frequency amplification gain, and outputting a signal CTLE_out containing equalized first training data pattern and equalized second training data pattern;
- a sampler sampling:
- (i) a difference dlev0LD;
- (ii) a difference dlev0HD;
- and (iii) a difference dlev1D or dlev2D, and outputting sampled differences as a signal SAMPLE_out, wherein the difference dlev0LD is a difference between:
- a first voltage level of the signal CTLE_out corresponding to the first data “00” of the equalized first training data pattern when a transition from the data “11” to the first data “00” occurs;
- and a lower limit dlev0L, the difference dlev0HD is a difference between:
- a second voltage level of the signal CTLE_out corresponding to one of second data “00” through the mth data “00” of the equalized first training data pattern;
- and an upper limit dlev0H, the difference dlev2D is a difference between:
- a third voltage level of the signal CTLE_out corresponding to the data “10” of the equalized second training data pattern;
- and the data level dlev2 corresponding to the data “10”, and the difference dlev1D is a difference between:
- a fourth voltage level of the signal CTLE_out corresponding to the data “01” of the equalized second training data pattern;
- and the data level dlev1 corresponding to data “01”;
- a DEMUX (demultiplexer) parallelizing the signal SAMPLE_out, and outputting parallelized signal SAMPLE_out as a signal DATA_out;
- a CDR (clock-and-data recovery) providing a clock signal for sampling to the sampler and the DEMUX;
- and
- a controller:
- (i) adaptively adjusting a high frequency amplification gain and a low frequency amplification gain of the CTLE by generating and providing a signal EQ_AC[NAC-1:0] and a signal EQ_DC[NDC-1:0] for adjusting the high frequency amplification gain and low frequency amplification gain based on the difference dlev0LD and the difference dlev0HD in the signal DATA_out, respectively;
- and (ii) providing the sampler with threshold voltages VTH01, VTH12 and VTH23, the data level dlev1 or dlev2, and the upper limit dlev0H and the lower limit dlev0L, wherein the threshold voltages VTH01, VTH12 and VTH23 are calculated from:
- a data level dlev0 corresponding to the data “00”;
- the data level dlev1 or dlev2;
- and a data level dlev3 corresponding to the data “11”, the data levels dlev1 and dlev2 are determined from the differences dlev1D and dlev2D, respectively;
- and the data level dlev0 is determined from the lower limit dlev0L and the upper limit dlev0H (where m is a natural number equal to or greater than 2, and NAC and NDC are natural numbers, respectively).
22 more elements
A method of training a PAM4 (pulse amplitude modulation 4) receiver comprising a linear equalizer, a sampler, a DEMUX (demultiplexer) and a controller, the method comprising:
- (a) receiving a signal containing:
- (i) a first training data pattern containing data “00” and consecutively arranged first data “11” through mth data “11”;
- and (ii) a second training data pattern including one of data “01”, data “10” and combinations thereof;
- (b) equalizing the signal received in step (a) according to an equalization parameter of the CTLE including a high frequency amplification gain and a low frequency amplification gain, and outputting a signal CTLE_out containing equalized first training data pattern and equalized second training data pattern;
- (c) sampling:
- (i) a difference dlev3HD;
- (ii) a difference dlev3LDand (iii) a difference dlev1D or dlev2D according to a sampling parameter of the sampler, and outputting sampled differences as a signal SAMPLE_out, wherein the difference dlev3HD is a difference between:
- a first voltage level of the signal CTLE_out corresponding to the first data “11” of the equalized first training data pattern when a transition from the data “00” to the first data “11” occurs;
- and an upper limit dlev3H, the difference dlev3LD is a difference between:
- a second voltage level of the signal CTLE_out corresponding to one of second data “11” through the mth data “11” of the equalized first training data pattern;
- and a lower limit dlev3L, the difference dlev1D is a difference between:
- a third voltage level of the signal CTLE_out corresponding to the data “01” of the equalized second training data pattern;
- and the data level dlev1 corresponding to the data “01”, and the difference dlev2D is a difference between:
- a fourth voltage level of the signal CTLE_out corresponding to the data “10” of the equalized second training data pattern;
- and the data level dlev2 corresponding to data “10”;
- (d) parallelizing the signal SAMPLE_out, and outputting parallelized signal SAMPLE_out as a signal DATA_out;
- (e) generating a signal EQ_AC[NAC-1:0] and a signal EQ_DC[NDC-1:0] for adjusting the high frequency amplification gain and low frequency amplification gain based on the difference dlev3HD and the difference dlev3LD in the signal DATA_out, respectively;
- (f) generating threshold voltages VTH01, VTH12 and VTH23 of the sampler by calculating the threshold voltages VTH01, VTH12 and VTH23 from:
- a data level dlev0 corresponding to the data “00”;
- the data level dlev1 or dlev2;
- and a data level dlev3 corresponding to the data “11”, wherein the data level dlev1 or dlev2 is determined from the difference dlev1D or dlev2D, respectively, and the data level dlev3 is determined from the upper limit dlev3H and the lower limit dlev3L;
- (g) adaptively adjusting the equalization parameter including the high frequency amplification gain and low frequency amplification using the signal EQ_AC[NAC-1:0] and signal EQ_DC[NDC-1:0] generated in step (e);
- and
- (h) adaptively adjusting the sampling parameter of the sampler according to the threshold voltages VTH01, VTH12 and VTH23, the data level dlev1 or dlev2, and the upper limit dlev3H and the lower limit dlev3L generated in step (f) (where m is a natural number equal to or greater than 2, and NAC and NDC are natural numbers, respectively).
21 more elements
A method of training a PAM4 (pulse amplitude modulation 4) receiver comprising a CTLE (continuous-time linear equalizer), a sampler, a DEMUX and a controller, the method comprising:
- (a) receiving a signal containing:
- (i) a first training data pattern containing data “11” and consecutively arranged first data “00” through mth data “00”;
- and (ii) a second training data pattern including one of data “01”, data “10” and combinations thereof;
- (b) equalizing the signal received in step (a) according to an equalization parameter of the CTLE including a high frequency amplification gain and a low frequency amplification gain, and outputting a signal CTLE_out containing equalized first training data pattern and equalized second training data pattern;
- (c) sampling:
- (i) a difference dlev0LD;
- (ii) a difference dlev0HD;
- and (iii) a difference dlev1D or dlev2D according to a sampling parameter of the sampler, and outputting sampled differences as a signal SAMPLE_out, wherein the difference dlev0LD is a difference between:
- a first voltage level of the signal CTLE_out corresponding to the first data “00” of the equalized first training data pattern when a transition from the data “11” to the first data “00” occurs;
- and a lower limit dlev0L, the difference dlev0HD is a difference between:
- a second voltage level of the signal CTLE_out corresponding to one of second data “00” through the mth data “00” of the equalized first training data pattern;
- and an upper limit dlev0H, the difference dlev2D is a difference between:
- a third voltage level of the signal CTLE_out corresponding to the data “10” of the equalized second training data pattern;
- and the data level dlev2 corresponding to the data “10”, and the difference dlev1D is a difference between:
- a fourth voltage level of the signal CTLE_out corresponding to the data “01” of the equalized second training data pattern;
- and the data level dlev1 corresponding to data “01”;
- (d) parallelizing the signal SAMPLE_out, and outputting parallelized signal SAMPLE_out as a signal DATA_out;
- (e) generating a signal EQ_AC[NAC-1:0] and a signal EQ_DC[NDC-1:0] for adjusting the high frequency amplification gain and low frequency amplification gain based on the difference dlev0LD and the difference dlev0HD in the signal DATA_out, respectively;
- (f) generating threshold voltages VTH01, VTH12 and VTH23 of the sampler by calculating the threshold voltages VTH01, VTH12 and VTH23 from:
- a data level dlev0 corresponding to the data “00”;
- the data level dlev1 or dlev2;
- and a data level dlev3 corresponding to the data “11”, wherein the data level dlev1 or dlev2 is determined from the difference dlev1D or dlev2D, respectively, and the data level dlev0 is determined from the lower limit dlev0L and the upper limit dlev0H;
- (g) adaptively adjusting the equalization parameter including the high frequency amplification gain and low frequency amplification using the signal EQ_AC[NAC-1:0] and signal EQ_DC[NDC-1:0] generated in step (e);
- and
- (h) adaptively adjusting the sampling parameter of the sampler according to the threshold voltages VTH01, VTH12 and VTH23, the data level dlev1 or dlev2, and the lower limit dlev0L and the upper limit dlev0H generated in step (f) (where m is a natural number equal to or greater than 2, and NAC and NDC are natural numbers, respectively).
22 more elements
Dependencies are inferred from the claim text.