Radio Frequency Chip, Baseband Chip, and WLAN Device

A baseband chip comprising:

• a baseband processing circuit;
• and
• a plurality of intermediate frequency processing circuits,
• wherein the plurality of intermediate frequency processing circuits comprise a first intermediate frequency processing circuit and a second intermediate frequency processing circuit,
• wherein an operating frequency band of the first intermediate frequency processing circuit is different from an operating frequency band of the second intermediate frequency processing circuit,
• wherein the baseband processing circuit is configured to:
• generate a plurality of baseband output signals based on a received data signal, and distribute the plurality of baseband output signals to the plurality of intermediate frequency processing circuits;
• or
• obtain data signals by processing baseband input signals received from the plurality of intermediate frequency processing circuits, and output the obtained data signals,
• wherein each of the plurality of intermediate frequency processing circuits is configured to:
• convert the received baseband output signal into an intermediate frequency signal, perform signal processing on the obtained intermediate frequency signal in time domain, and output a processed intermediate frequency signal through a baseband chip pin;
• or
• perform signal processing, in time domain, on an intermediate frequency signal received from a baseband chip pin, convert a processed intermediate frequency signal into a baseband input signal, and output the obtained baseband input signal, and
• wherein a mode in which signals are provided between the baseband processing circuit and a plurality of baseband chip pins of the baseband chip through the plurality of intermediate frequency processing circuits is adjustable.

A wireless local area network (WLAN) device comprising:

• a baseband chip;
• at least two radio frequency chips;
• and
• at least four antennas,
• wherein each of the at least two radio frequency chips has at least three radio frequency signal pins and at least three intermediate frequency signal pins,
• wherein at least three radio frequency signal pins and at least three intermediate frequency signal pins of a same radio frequency chip are in a one-to-one correspondence,
• wherein each of the at least two radio frequency chips is connected to at least two antennas in the at least four antennas,
• wherein any radio frequency chip in the at least two radio frequency chips is configured to generate radio frequency local oscillator signals that belong to at least two frequency bands,
• wherein the at least three radio frequency signal pins of the any radio frequency chip comprise a first radio frequency signal pin and a second radio frequency signal pin,
• wherein the any radio frequency chip is configured to:
• convert, based on a radio frequency local oscillator signal that belongs to one frequency band in the at least two frequency bands, a radio frequency signal received from the first radio frequency signal pin into an intermediate frequency signal;
• output the intermediate frequency signal obtained through conversion from an intermediate frequency signal pin corresponding to the first radio frequency signal pin;
• convert an intermediate frequency signal received from the intermediate frequency signal pin corresponding to the first radio frequency signal pin into a radio frequency signal;
• output the radio frequency signal obtained through conversion from the first radio frequency signal pin;
• convert, based on a radio frequency local oscillator signal that belongs to another frequency band in the at least two frequency bands, a radio frequency signal received from the second radio frequency signal pin into an intermediate frequency signal;
• output the intermediate frequency signal obtained through conversion from an intermediate frequency signal pin corresponding to the second radio frequency signal pin;
• convert an intermediate frequency signal received from the intermediate frequency signal pin corresponding to the second radio frequency signal pin into a radio frequency signal;
• and
• output the radio frequency signal obtained through conversion from the second radio frequency signal pin,
• wherein the baseband chip has a plurality of baseband chip pins,
• wherein at least three intermediate frequency signal pins of each of the at least two radio frequency chips are connected to at least three baseband chip pins of the plurality of baseband chip pins in a one-to-one correspondence manner,
• wherein the baseband chip is configured to:
• obtain an intermediate frequency signal based on a received data signal and provide the obtained intermediate frequency signal to the radio frequency chip through the baseband chip pin of the baseband chip;
• or
• obtain a data signal based on an intermediate frequency signal received from any one of the plurality of baseband chip pins and output the obtained data signal,
• wherein operating frequency bands corresponding to the plurality of baseband chip pins are adjustable
• wherein connection lines between all radio frequency signal pins and corresponding antennas in the WLAN device do not intersect,
• wherein connection lines between all intermediate frequency signal pins and corresponding baseband chip pins in the WLAN device do not intersect, and
• wherein a connection line between any radio frequency signal pin in all the radio frequency signal pins and a corresponding antenna does not intersect a connection line between any intermediate frequency signal pin in all the intermediate frequency signal pins and a corresponding baseband chip pin.