Information processing apparatus and non-transitory computer readable medium
AssigneeFUJIFILM Business Innovation Corp.
InventorHirofumi SASAKI
Life of this patent
Estimating the term…
Abstract
An information processing apparatus includes a processor connected to a programmable logic circuit. The processor is configured to: allow a first circuit reconfigured in a first region of the programmable logic circuit to execute a process; in parallel with the process of the first circuit, allow a second circuit to be reconfigured in a second region different from the first region; and adjust at least one of a clock frequency used in the process of the first circuit and a clock frequency used in reconfiguration of the second circuit so that a time point at which the process of the first circuit is completed and a time point at which the reconfiguration of the second circuit is completed will become closer to each other.
Claims20
An information processing apparatus comprising:
- a processor connected to a programmable logic circuit, the processor being configured to
- allow a first circuit reconfigured in a first region of the programmable logic circuit to execute a process,
- in parallel with the process of the first circuit, allow a second circuit to be reconfigured in a second region different from the first region, and
- adjust at least one of a clock frequency used in the process of the first circuit and a clock frequency used in reconfiguration of the second circuit so that a time point at which the process of the first circuit is completed and a time point at which the reconfiguration of the second circuit is completed will become closer to each other.
A non-transitory computer readable medium storing a program causing a computer including a processor connected to a programmable logic circuit to execute a process, the process comprising:
- allowing a first circuit reconfigured in a first region of the programmable logic circuit to execute a process;
- in parallel with the process of the first circuit, allowing a second circuit to be reconfigured in a second region different from the first region;
- and
- adjusting at least one of a clock frequency used in the process of the first circuit and a clock frequency used in reconfiguration of the second circuit so that a time point at which the process of the first circuit is completed and a time point at which the reconfiguration of the second circuit is completed will become closer to each other.
Dependencies are inferred from the claim text.