Level shifting device and method

A method of delivery of an output potential level among two first levels according to an input level among two second levels, comprising:

• delivering the output potential level by a first node connecting together first and second transistors electrically in series between two second nodes of application of the two first levels;
• delivering, by a first voltage generator powered by one of the second nodes, a first DC voltage defining a high limit for the control voltage of the first transistor;
• and
• delivering, by a second voltage generator controlled by a value representative of the first voltage and powered between the second nodes, a second DC voltage defining a high limit for the control voltage of the second transistor.

A circuit, comprising

• a current mirror circuit including a first transistor coupled between a high supply potential node and a first intermediate node and a second transistor coupled between the high supply potential node and a second intermediate node, said second transistor having a control terminal coupled to a control terminal of the first transistor and the first intermediate node;
• a current source coupled between the first intermediate node and a ground node;
• a first capacitor coupled between the high supply potential node and the first intermediate node and configured to provide a first voltage;
• a third transistor coupled between the second intermediate node and a low supply potential node, the third transistor having a control terminal coupled to the second intermediate node;
• a second capacitor coupled between the second intermediate node and the low supply potential node and configured to provide a second voltage;
• a first output transistor and a second output transistor connected at an output node, wherein the first and second transistors are electrically in series between the high supply potential node and the low supply potential node;
• a first drive circuit supplied by the first voltage and configured to generate a first control signal applied to a control terminal of the first output transistor;
• and
• a second drive circuit supplied by the second voltage and configured to generate a second control signal applied to a control terminal of the second output transistor.