Epitaxial Features

A semiconductor device, comprising:

• a plurality of silicon channel members disposed over a substrate;
• a plurality of dielectric inner spacer features interleaving the plurality of silicon channel members, each of the plurality of silicon channel members including a rounded end;
• a gate structure wrapping around each of the plurality of silicon channel members;
• and
• a source/drain feature comprising:
• a first epitaxial layer in contact with the substrate and rounded ends of the plurality of silicon channel members, and
• a second epitaxial layer in contact with the first epitaxial layer and the plurality of dielectric inner spacer features,
• wherein the first epitaxial layer and the second epitaxial layer comprise silicon germanium,
• wherein a germanium content of the first epitaxial layer is between about 20% and about 30%,
• wherein a germanium content of the second epitaxial layer is between about 50% and about 60%.

A method, comprising:

• forming a stack over a substrate, wherein the stack comprises a plurality of silicon layers interleaved by a plurality of silicon germanium layers;
• forming a fin-shaped structure from the stack and the substrate, the fin-shaped structure comprising a channel region and a source/drain region;
• forming a dummy gate stack over the channel region of the fin-shaped structure;
• depositing a gate spacer layer over the dummy gate stack;
• recessing the source/drain region to form a source/drain trench that exposes sidewalls of the plurality of silicon layers and the plurality of silicon germanium layers;
• selectively and partially recessing the plurality of silicon germanium layers to form a plurality of inner spacer recesses;
• forming a plurality of inner spacer features in the plurality of inner spacer recesses;
• depositing a first epitaxial layer in the source/drain trench, the first epitaxial layer being in contact with the plurality of silicon layers;
• depositing a second epitaxial layer over the first epitaxial layer, the second epitaxial layer being in contact with the plurality of inner spacer features and the first epitaxial layer;
• depositing a third epitaxial layer on the second epitaxial layer;
• after the depositing of the third epitaxial layer, removing the dummy gate stack;
• releasing the plurality of silicon layers in the channel region as a plurality of channel members;
• and
• forming a gate structure around each of the plurality of channel members,
• wherein the first epitaxial layer and the second epitaxial layer comprise silicon germanium,
• wherein a germanium content of the second epitaxial layer is greater than a germanium content of the first epitaxial layer.