Gate material-based capacitor and resistor structures and methods of forming the same
AssigneeSanDisk Technologies LLC
InventorsHokuto KODATE, Hiroyuki OGAWA, Dai IWATA, Mitsuhiro TOGO
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Abstract
At least one of a capacitor or a resistor structure can be formed concurrently with formation of a field effect transistor by patterning a gate dielectric layer into gate dielectric and into a first node dielectric or a first resistor isolation dielectric, and by patterning a semiconductor layer into a gate electrode and into a second electrode of a capacitor or a resistor strip. Contacts are then formed to the capacitor or resistor structure. Sidewall spacers may be formed on the gate electrode prior to patterning the capacitor or resistor contacts to reduce damage to the underlying capacitor or resistor layers.
Claims20
A semiconductor structure comprising a capacitor structure located on a semiconductor substrate including a substrate semiconductor layer, wherein the capacitor structure comprises:
- a first electrode comprising a first substrate semiconductor portion of the substrate semiconductor layer;
- a first node dielectric located on a top surface of the first substrate semiconductor portion of the substrate semiconductor layer;
- a second electrode comprising a first semiconductor plate located on a top surface of the first node dielectric;
- a second node dielectric located on a top surface of the first semiconductor plate;
- a third electrode comprising a stack of a primary semiconductor plate and a primary metallic plate;
- a moat trench laterally surrounding the third electrode;
- a peripheral stack laterally surrounding the third electrode, wherein the peripheral stack comprises a peripheral semiconductor plate and a peripheral metallic plate, and wherein the peripheral semiconductor plate contacts a peripheral portion of a top surface of the second node dielectric, comprises a same material as the primary semiconductor plate, and is laterally spaced from the primary semiconductor plate;
- and
- at least one contact-level dielectric layer laterally extending over the third electrode and the peripheral stack.
A method of forming a semiconductor structure comprising a capacitor structure on a semiconductor substrate including a substrate semiconductor layer, the method comprising:
- forming a first stack including a first node dielectric and a first semiconductor plate on a top surface the first substrate semiconductor portion of the substrate semiconductor layer;
- forming a second stack including a second node dielectric and a semiconductor sheet over the first stack;
- forming a metallic sheet over the second stack and over a peripheral portion of a top surface of the first semiconductor plate;
- dividing the metallic sheet and the semiconductor sheet into an inner layer stack surrounded by a moat trench and a peripheral stack surrounding the moat trench, wherein sidewalls of the inner layer stack and sidewalls of the peripheral stack are physically exposed in the moat trench;
- forming at least one contact-level dielectric layer directly on the sidewalls of the inner layer stack and the sidewalls of the peripheral stack;
- and
- forming contact via structures through the at least one contact-level dielectric layer on the inner layer stack and on the peripheral stack,
- wherein:
- the inner layer stack comprises a primary semiconductor plate and a primary metallic plate;
- the peripheral stack includes a peripheral semiconductor plate and a peripheral metallic plate;
- the primary semiconductor plate and the peripheral semiconductor plate are patterned portions of the semiconductor sheet;
- and
- the primary metallic plate and the peripheral metallic plate are patterned portions of the metallic sheet.
Dependencies are inferred from the claim text.