Apparatus for Extension of Operation Voltage

A method of fabricating a semiconductor device, comprising in any order:

• forming a semiconductor substrate comprising an upper semiconductor layer having an upper surface and a first conductivity type and a second buried semiconductor layer having a second, opposite conductivity type;
• forming a deep trench isolation structure in the semiconductor substrate next to an active device region disposed at the upper surface of the semiconductor substrate, the deep trench isolation structure comprising a conductive contact structure and a sidewall insulator formed in the semiconductor substrate to extend from the upper surface of the semiconductor substrate into the semiconductor substrate;
• and
• forming a dummy lateral-diffused-metal-oxide-semiconductor (LDMOS) device positioned in the active device region at a peripheral location adjacent to the deep trench isolation structure and next to one or more active LDMOS devices positioned in the active device region by:
• selectively implanting dopants of the second conductivity type into the upper surface of the semiconductor substrate to form first and second body regions to contact the second buried layer, thereby defining:
• a peripheral buffering region in the upper semiconductor layer positioned between the deep trench isolation structure and the first body region, and
• a drift region in the upper semiconductor layer positioned between the first and second body regions;
• forming first and second gate electrodes over the semiconductor substrate, the first gate electrode covering a first part of the drift region and at least part of the first body region to define a first channel region inside the first body region, and the second gate electrode covering a second part of the drift region and at least part of the second body region to define a second channel region inside the second body region;
• and
• selectively implanting dopants of the first conductivity type into the upper surface of the semiconductor substrate to simultaneously form a drain region located in the central drain region, a first source region formed in the first body region adjacent to the first gate electrode, and a second source region formed in the second body region adjacent to the second gate electrode.