Integrated circuits having dielectric layers including an anti-reflective coating

An integrated circuit, comprising:

• a substrate;
• a first metal layer located over the substrate;
• a capacitor including the first metal layer and a four-layer dielectric stack located on the first metal layer, the four-layer dielectric stack including:
• a first silicon oxide layer on the first metal layer;
• a silicon oxynitride layer on the first silicon oxide layer;
• a second silicon oxide layer on the silicon oxynitride layer;
• and
• a silicon nitride layer on the second silicon oxide layer;
• and
• the capacitor further including a capacitor metal layer disposed on the silicon nitride layer, wherein the capacitor metal layer and the silicon nitride layer have a first lateral dimension in a first direction and the first silicon oxide layer, silicon oxynitride layer, and second silicon oxide layer have a second lateral dimension in the first direction, the second layer dimension greater than the first lateral dimension.

An integrated circuit, comprising:

• a substrate with a first metal interconnect layer;
• a metal structure of a second metal interconnect layer, the metal structure having a first width located over the substrate;
• a capacitor including the metal structure and a four-layer dielectric stack located on the metal structure, the four-layer dielectric stack including:
• a first oxide layer of the first width on the metal structure;
• an antireflective coating of the first width on the first oxide layer;
• a second oxide layer of the first width on the antireflective layer;
• and
• a nitride-containing layer of a second width less than the first width on the second oxide layer;
• the capacitor further including a capacitor metal layer of the second width disposed on the nitride-containing layer;
• and
• a third metal interconnect layer over the capacitor.