Wafer with localized semiconductor on insulator regions with cavity structures
AssigneeGlobalFoundries U.S. Inc.
InventorsSiva P. ADUSUMILLI, Anthony K. STAMPER, Bruce W. PORTH, John J. ELLIS-MONAGHAN
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Abstract
The present disclosure relates to semiconductor structures and, more particularly, to a wafer with localized cavity structures and methods of manufacture. A structure includes a bulk substrate with localized semiconductor on insulator (SOI) regions and bulk device regions, the localized SOI regions includes multiple cavity structures and substrate material of the bulk substrate.
Claims20
A structure comprising a bulk substrate with localized semiconductor on insulator (SOI) regions and bulk device regions, the localized SOI regions comprising multiple cavity structures and substrate material of the bulk substrate.
A structure comprising:
- at least one bulk device region comprising bulk substrate material;
- and
- a plurality of localized semiconductor on insulator (SOI) device regions coplanar with the at least one bulk device region, the localized SOI device regions comprising multiple cavity structures having different depths within the bulk substrate material and an upper layer of the bulk substrate material.
A method comprising:
- forming amorphous regions of a first depth within a bulk substrate;
- forming amorphous regions of a second depth within the bulk substrate;
- removing the amorphous regions to form cavity structures at the first depth and the second depth, leaving substrate material of the bulk substrate above the cavity structures;
- and
- lining the cavity structures with insulator material.
Dependencies are inferred from the claim text.